USB 2.0 PHY IP core | Arasan Chip Systems
USB 2.0 extender control chipCH317 - NanjingQinhengMicroelectronics
EETimes - New FPGA-based USB 3.0 SuperSpeed Device Controller From SLS
USB 2.0 Device Controller IP Core (USB20SF)
USB 2.0/HSIC PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
MB86C311A TQFP-64 chip with hardware AES USB 3.0 PHY (Device) USB 3.0 IC | eBay
Mixed-Signal Verification for USB 2.0 Physical Layer IP
Chip controls up to seven USB-C ports, and Power Delivery
USB 2.0 PHY for SoC Designs | Cadence IP
USB 2.0 Solutions | Arasan Chip Systems
Physical layer - Wikiwand
ASMedia Demos USB 3.2 Gen 2x2 PHY, USB 3.2 Controller Due in 2019
usb3300-ezk hi speed usb host or device phy with ulpi low pin interface
USB-IF certified solutions for USB type-C and Power Delivery - STMicroelectronics
c++ - stm32 timing ULPI interface - Stack Overflow
XR2280x Hi-Speed USB to 10/100 Ethernet Bridge ICs - MaxLinear | Mouser
TUSB1210 data sheet, product information and support | TI.com
Physical layer - Wikipedia
USB 2.0 Full High Speed Solution | NXP Semiconductors
TUSB1210-Q1 data sheet, product information and support | TI.com
CP220x Ethernet Controllers - Silicon Labs
USB Communicator
Difference between USB and ULPI - Electrical Engineering Stack Exchange
EVB-LAN7500-LC - Microchip - Evaluation Board, USB/Ethernet PHY
DWTB: USB High Speed Inter-Chip (HSIC) IP: What is it? And why should I use it?
